1. Field of the Invention
This invention relates to a semiconductor manufacturing technology and, more particularly, to a method of forming channels for metal-oxide-semiconductor (MOS) field effect transistors (FETs).
2. Description of the Prior Art
So called integrated circuit is an electrical technology which could shrink the size of a designed set including at least several hundred electrical devices, such as resistors, capacitors and insulators to a feature size as small as 0.18 micrometers by methods of film deposition, lithography, etching etc in today's technology.
One of the most commonly used FET structure is MOS which composed of three different materials--metal, oxide, and semiconductor. The interface of metal and oxide is named the gate electrode or gate, and two regions with opposite polarity to that of the semiconductor are named individually "source" and "drain". The operating principle of MOS is that while no external voltage is biased, source and drain act like a back-to-back p-n junction and only little leakage current is permitted to flow from between each other. However, while a forward bias greater than so-called threshold voltage is put on the gate, inversion of the MOS structure causes producing a surface inversion region, so that the originally isolated source and drain become conducted. This surface inversion region is called "channel" which is able to provide conduction of large current, and the initial voltage resulting in the inversion effect is called the threshold voltage (V.sub.T).
The threshold voltage which is an important parameter in MOS operation can be controlled by adjusting, for example, the dopping density of the channel, the thickness of the gate oxide, or the forward bias to the substrate. However, among all these approaches, the most effective one is to adjust the dopping density of the substrate that could be controlled precisely through the method such as ion implantation.
The conventional way to regulate the threshold voltage is by operating ion plantation to the substrate after the gate oxide is formed. Taking an example of NMOS transistor, p-type impurity is usually used to be doped into a p-type substrate, then polysilicon and silicide as the metal layer of the transistor are deposited, after definition, the whole structure of gate is completed. However, ion implantation is not operated until the gate oxide is well formed, the direct bombardment of ions unto the gate oxide will cause tremendous damage to its surface. Moreover, the dopants of polysilicon and the by-products when depositing silicide will penetrate into the gate oxide during the following manufacturing processes. All these factors are going to definitely damage the gate structure, then satisfactory electrical characteristics of a transistor are hardly to find.
Although the conventional technology offers an improved method to better the mentioned drawbacks, but some other side effects still result in the damage of the gate property. It is working in this way: starting channel ion implantation before forming the gate oxide. But what worse is that the high temperature up to higher than 800 degree C while forming the gate oxide will further induce the spreading out of the doped ions, even into the substrate or the gate oxide. Once happened, it gets more difficult to control the impurity density, and further, the property of the gate oxide will be exceedingly damaged, thus the expression of whole transistor is unavoidably degraded.